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(Click for frequent words.) 65 parallelization 62 multithreading 62 multithreaded 62 multithread 61 multi threading 60 multithreaded applications 60 multicore 60 multi threaded 60 multicore processors 59 multicore CPUs 58 multiprocessors 58 multiprocessing 58 multithreaded processors 58 multiprocessor 57 O subsystem 57 cache coherency 57 SIMD instructions 57 parallelizing 57 multi threaded applications 57 Parallelism 56 hyper threading 56 CPU cores 56 multicore architectures 56 Multi threading 55 multiprocessor systems 55 JVMs 55 parallelized 55 Hyperthreading 55 OpenMP 55 hyperthreading 55 multiple CPU cores 54 multicore chips 54 CPU architectures 54 SIMD 54 massively parallel 54 simultaneous multithreading 54 Symmetric Multiprocessing SMP 54 symmetric multiprocessing 54 compiler optimizations 54 programmability 54 GPGPU 54 processor cores 53 Xilinx FPGA 53 highly parallelized 53 synchronization primitives 53 symmetric multiprocessing SMP 53 RISC processor 53 CPU 53 parallelize 53 HyperThreading 53 manycore 53 SSE2 53 Hyper Threading 53 hardware acceleration 52 datapath 52 Altivec 52 Amdahl Law 52 multicore processing 52 speedups 52 coprocessor 52 bytecodes 52 #bit [001] 52 computational horsepower 52 architectures 52 multicores 52 interprocess communication 52 chip multithreading 52 multithreading capabilities 52 interleaving 52 PowerPCs 52 RDMA 52 AltiVec 51 multipathing 51 interrupt latency 51 multicore x# 51 CPUs 51 testbenches 51 Stratix III FPGAs 51 compute nodes 51 cluster interconnect 51 memory subsystem 51 compute intensive 51 L2 caches 51 InfiniPath 51 SystemC models 51 multicore CPU 51 GPGPUs 51 debuggers 51 VLIW 51 compute intensive tasks 51 deterministic 51 latencies 51 multicore processor 51 computational 51 GPUs 51 Mitrion C 50 coherency 50 coprocessors 50 IXP# [001] 50 superscalar 50 debugging 50 testbench 50 Cortex M3 core 50 Nvidia GPUs 50 AMD HyperTransport 50 symmetrical multiprocessing 50 RISC microprocessor 50 heterogeneous multicore 50 remoting 50 VarioTAP ® 50 cluster nodes 50 asymmetric multiprocessing 50 microcode 50 integer 50 hardware accelerators 50 debug 50 cores 50 RLDRAM II 50 GB sec 50 MIPS processors 50 processing cores 50 FPGA fabric 50 Multithreaded 50 GDDR SDRAM 50 binary compatibility 50 computationally intense 50 GPFS 50 DSP architectures 50 HPC workloads 50 reconfigurable computing 49 ZFS filesystem 49 #.#GT s 49 coprocessing 49 reconfigurable logic 49 computing architectures 49 x# architectures 49 #MIPS [002] 49 L1 cache 49 SIMD instruction 49 Hyper threading 49 deep submicron 49 Nvidia Tesla 49 C#x + 49 scalar 49 Cortex A9 processor 49 heterogeneous architectures 49 Rosetta emulation 49 fpgas 49 Hypertransport 49 MPSoC 49 scalability 49 FPGA 49 GPU 49 NanoTime 49 multi pathing 49 CPU utilization 49 UltraSPARC T1 49 SGI RASC 49 compute intensive workloads 49 modularity 49 RDBMSs 49 Infiniband 49 Intel EM#T 49 SSE3 49 RISC architecture 49 Multicore processors 49 recursion 49 Interface MPI 49 iWARP 49 SH 2A 49 algorithmic synthesis 49 reconfigurability 49 TILE# 49 Panasas storage 49 fully synthesizable 48 encoding decoding 48 LINQ queries 48 DSPs FPGAs 48 throughput 48 datapaths 48 DSP FPGA 48 massively parallel processing 48 ACCELLERANT 48 x# processors 48 interprocessor communication 48 superscalar architecture 48 FB DIMM 48 RISC processors 48 object relational 48 HPC clusters 48 optimizations 48 OpenAccess database 48 ARM cores 48 Multithreading 48 microprocessor architectures 48 InfiniBand interconnects 48 linear scalability 48 #GB/sec 48 nondeterministic 48 associativity 48 SystemC modeling 48 QuickPath 48 query optimizer 48 vNIC 48 interoperation 48 massively parallel computing 48 Gbits s 48 impedances 48 CMOS transistors 48 Hyper Threading Technology 48 massively parallel architecture 48 prefetch 48 bit RISC processor 48 SSE4 48 MicroBlaze processor 48 Quick Path Interconnect 48 geometries 48 1Mbyte 48 instantiation 48 asynchronous 48 lambdas 48 optimizing compiler 48 InfiniBand interconnect 48 #.#Gb s [003] 48 TMS#DM# [002] 48 impedance mismatch 48 PCIe interface 48 vectorization 48 DSP BIOS TM 48 JIT compilation 48 SR IOV 48 GPU computing 48 MapReduce 48 Multiprocessor 48 Tesla GPUs 48 rasterization 48 #Kbyte [002] 48 multicore DSPs 48 clockless 47 computational complexity 47 pixel shaders 47 concurrency 47 multicore architecture 47 Coherence 47 #K CPS 47 #bit processors 47 Xtensa processor 47 BLAS 47 DMA controller 47 TestKompress 47 multicore designs 47 macroblock 47 emulation 47 Vdd 47 SOPC Builder 47 embedded multicore 47 TCP IP protocol 47 kernel 47 TCP IP offload 47 INtime 47 serial interfaces 47 UltraSPARC T2 47 computationally intensive 47 XSLT stylesheets 47 PathScale InfiniPath 47 memory addressability 47 granularity 47 logic synthesis 47 heterogeneous computing 47 vMotion 47 RAID0 47 TI C#x 47 transistor leakage 47 I2C bus 47 ARM Cortex A9 MPCore 47 Logical Volume Manager 47 Intel Hyper Threading 47 #.#Gbps [004] 47 Power4 + 47 DDR PHY 47 shader 47 programmable vertex 47 2MB L2 cache 47 GFLOPS 47 8bit MCUs 47 computationally intensive tasks 47 multicore multithreaded 47 P Invoke 47 Message Passing 47 stateless offload 47 GPU compute 47 MIPS cores 47 JVM 47 subroutines 47 iSCSI HBA 47 Intel hyperthreading 47 ARM# MPCore multicore processor 47 XML parser 47 FIFOs 47 datatypes 47 matrix multiplication 47 multiply accumulate 47 CPU cycles 47 Kaminario K2 47 POSIX 47 QoR 47 grid computing 47 ZFS file 47 Mbytes sec 47 TCP IP networking 47 arbitrary waveforms 47 datarates 47 ARMv7 47 ARM# [003] 47 Cortex M4 processor 47 #MIPS [001] 47 #bits 47 eDRAM 47 Compute Appliances 47 CMOS compatible 47 2MB L3 cache 47 fanout 47 NVIDIA GPUs 47 spatial temporal 47 clockspeed 47 nonblocking 47 SoC designers 47 RTL synthesis 47 observability 47 #/#-bit [001] 46 eth0 46 DMIPS 46 Westmere EX 46 HyperTransport 46 Threading Building Blocks 46 x# architecture 46 DDR2 memory interface 46 DDR memory 46 RISC architectures 46 NET CLR 46 OpenGL Shading Language 46 IBM POWER5 46 RISC DSP 46 PHY layer 46 compute density 46 debugging tools 46 5x #x 46 compute clusters 46 FineSim Pro 46 Posix 46 DIMM modules 46 Vcore 46 hyper threaded 46 MicroBlaze 46 PowerPC architecture 46 Multiprocessing 46 XAUI 46 Blackfin processors 46 recompile 46 Cortex M4 46 MIPS processor 46 μsec 46 XML parsing 46 pixel shader 46 Cortex A9 processors 46 Power4 46 ADRES 46 Carrier Grade RTLinux 46 DirectFLOW 46 MATLAB 46 Power5 + chips 46 Error Correction Code 46 extensibility 46 MIPS 46 interfaces 46 PowerPC #FX 46 Parallel Computing Toolbox 46 uC OS III 46 serdes 46 NVIDIA Tesla GPUs 46 multi threaded architecture 46 #.#GB/sec [002] 46 RISC cores 46 C#x DSPs [001] 46 TCP IP 46 SH 4A 46 MathWorks MATLAB 46 SSL offloading 46 DirectCompute 46 QEMU 46 x# cores 46 quad socket 46 Java bytecode 46 #bit MCUs 46 A9 processor 46 Freescale QorIQ 46 AMBA interconnect 46 multiprocess 46 ARM# [001] 46 MemoryScape 46 Linux kernels 46 Intel HyperThreading 46 deterministic latency 46 multibit 46 LabVIEW graphical programming 46 ARM7 46 multicore processor architectures 46 TCP IP stack 46 Tesla C# 46 SystemWeaver 46 smaller geometries 46 autonomics 46 abstraction 46 failover clustering 46 TCP protocol 46 #nm SOI 46 Fast Fourier Transform FFT 46 1MB L2 cache 46 VMware HA 46 logic analyzer 46 repartitioning 46 8GHz 46 interconnects 46 IBM GPFS 46 XSLT transformations 46 RTLinux 46 TSQL 46 Stratix IV FPGA 46 Hybrid CrossFire 46 SPARC# 46 ARM CPU 46 x# processor 46 chip multithreading CMT 46 TurboBoost 46 Freescale QorIQ P# 46 GPU acceleration 46 routability 46 #-/#-bit 46 Solido Variation Designer 46 IA# [003] 46 clustered computing 46 ANSI C 46 XSLT transformation 46 areal density 46 microarchitectures 46 ASIC prototyping 46 1Gbyte 45 CE ATA interface 45 Xtensa LX 45 LLVM 45 silicon waveguides 45 zIIP processor 45 guest OSes 45 RXAUI 45 GDDR3 45 CSX# [001] 45 #K bytes [002] 45 runtime 45 EEMBC benchmarks 45 #.#GB s [001] 45 bit memory addressability 45 Turbo Mode 45 raytracing 45 ECC unbuffered memory 45 compute intensive applications 45 computationally 45 DSP algorithms 45 vertex shader 45 UltraSPARC 45 Rambus XDR memory 45 Symmetric Multi Processing 45 DDR2 DRAM 45 HCS# 45 AMD GPUs 45 Boolean expressions 45 PowerPC 45 Grid computing 45 Intel hyper threading 45 microsecond latencies 45 #Gbit [001] 45 Vertex Shader 45 Cortex A8 processor 45 NTFS file 45 runtime environments 45 Scali MPI Connect 45 3GHz processor 45 Intel Pentium Processor 45 simulated annealing 45 deterministically 45 Parallel ATA 45 SPARC V8 45 quantization 45 PCI Express interface 45 clockspeeds 45 EJBs 45 QUICC Engine technology 45 SpeedStep 45 interleaved 45 clock gating 45 Debugger 45 variational 45 uniprocessor 45 topology 45 gigabit serial 45 JTAG interface 45 dynamically typed 45 3Gb/sec 45 userspace 45 O MPIO 45 pixel shading 45 ActiveRecord 45 GDDR3 memory 45 #:# LVDS 45 UltraSPARC processors 45 ® Hyper Threading 45 z OS V#.# [001] 45 #.#Gbit/sec 45 abstraction layer 45 RealView Profiler 45 serial ATA 45 daughtercards 45 L3 cache 45 Intel XScale 45 Virtual Machine VM 45 SiS# chipset 45 UltraSPARC T1 processor 45 GoldTime 45 #.#GBps 45 instantiate 45 Intel Nehalem processors 45 Gbps InfiniBand 45 Gb sec 45 compute cycles 45 #.#Gbit s [002] 45 binaries 45 frontside bus 45 C# DSP 45 endian 45 serializer 45 PowerPC cores 45 IO Link 45 parsers 45 ray tracing 45 RTCore 45 logical partitions 45 OpenGL API 45 FPGAs 45 JIT compiler 45 async 45 deep sub micron 45 Intel QuickPath 45 SSE5 45 opcodes 45 SiGe bipolar 45 recompiling 45 Netburst 45 CPU GPU 45 Data ONTAP GX 45 3PAR Gen3 ASIC 45 dsPIC DSC 45 Lucid HYDRA 45 #/#-bit [002] 45 ARM#EJ processor 45 CPUs GPUs 45 multicore computing 45 PCIe Gen2 45 Via Nano 45 JVM Java 45 respin 45 chip SoCs 45 parasitic extraction 45 binary 45 computationally efficient 45 NVIDIA Tesla C# 45 Cavium OCTEON 45 power dissipation 45 netlists 45 Ultra# SCSI 45 SAR ADC 45 OpenGL graphics 45 hyper threading technology 45 parallel 45 #GBps 45 LPC# 45 L2 cache 45 DDR2 memory 45 finer granularity 45 4Gbps 45 serializer deserializer 45 SoC architectures 45 Myrinet 45 V2 ColdFire 45 Solaris SPARC 45 ATI GPUs 45 uClinux 45 QDRII 45 2eSST 45 DDR1 44 Fortran 44 Opteron CPUs 44 PowerVR SGX graphics 44 geometry shaders 44 Geometry Shader 44 symmetric multiprocessor 44 bandwidths 44 Hypervisors 44 decompilation 44 GFlops 44 1U server 44 Direct3D 44 LabWindows CVI 44 shader processors 44 respins 44 μC OS III 44 Opteron Processors 44 PHY interfaces 44 SPARC processor 44 GZIP compression 44 Xgrid 44 AVR# [002] 44 DDR3 SDRAM 44 TMS#C#x + DSP 44 terascale 44 Intel #P chipset [001] 44 #MHz DDR [001] 44 Intel QuickPath Interconnect 44 SCSI disks 44 multiplexing 44 Xtensa LX processor 44 quad core CPUs 44 Cortex A9 44 ARM7TDMI core 44 zIIP 44 XLP Processor 44 Jumbo Frames 44 Native Command Queuing 44 AT#SAM# [002] 44 HLSL 44 linearly scalable 44 Java APIs 44 Optimizations 44 backward compatibility 44 PHYs 44 NVIDIA nForce Professional 44 Harpertown processors 44 FORTRAN 44 EM#T 44 Zroute 44 ARM7TDMI processor 44 operands 44 optimisations 44 PCI Express 44 pixel pipelines 44 Nios II processor 44 Reference Methodology 44 FPGA prototyping 44 SFP + modules 44 superset 44 impedance matching 44 Intel Nehalem 44 #MHz FSB [001] 44 Lucid Hydra 44 elliptic curve 44 CABAC 44 TSMC #nm process 44 recompilation 44 MPC# processor 44 DSLs 44 synthesizable IP 44 graphics subsystem 44 ARM#EJ S core 44 debugger 44 EJB container 44 NCBI BLAST 44 bitwise 44 DTrace 44 VAAI 44 AGP 8X 44 Sparc processor 44 Quadro GPUs 44 3DNow 44 dataflow 44 synthesizable 44 HW SW 44 Power5 44 kbyte 44 NCQ 44 scales linearly 44 TetraMAX 44 Torrenza 44 Nios II Compiler 44 POWER5 44 Actel FPGAs 44 IBM eServer p5 44 AMD Fusion APUs 44 GPU accelerators 44 memcached 44 sRIO 44 UltraSparc chips 44 ioMemory 44 NetQueue 44 ATCA blade 44 buffer overruns 44 defect densities 44 Mips 44 bidirectional communication 44 iSCSI protocol 44 8MB L3 cache 44 TCP offload 44 x# CPU 44 Mitrion 44 HyperTransport links 44 #Mbyte [001] 44 DDR# memory 44 multicore DSP 44 GUIs 44 MLC NAND flash 44 fragment shaders 44 FBDIMM 44 ARM Cortex A8 44 AMD FireStream 44 MIPS architecture 44 8bit MCU 44 multiprocessor servers 44 Intel Itanium processors 44 relational OLAP 44 DL# G2 44 latency 44 #nm CMOS [001] 44 Altera Quartus II 44 factorization 44 invariants 44 microMIPS ISA 44 PowerQUICC II 44 abstraction layers 44 Power5 + 44 JavaScript DOM 44 Tensilica Xtensa 44 Intel Xeons 44 InfiniBand DDR 44 Nucleus PLUS 44 multirate 44 binary compatible 44 FCRAM 44 Dhrystone 44 processors 44 4KB 44 QuickPath interconnect 44 TCP multiplexing 44 eSi 44 AMD# processors 44 G.PAK 44 Jaxer 44 TetraMAX ATPG 44 fast Fourier transform 44 MCS# 44 #D/#D graphics engine 44 Azul Compute Appliance 44 SLI mode 44 inline deduplication 44 Shor algorithm 44 LISP 44 Deterministic 44 filesystems 44 Fortran compilers 44 5V CMOS 44 SATA controllers 44 buffer overflows 44 MATLAB ® 44 Schrodinger equation 44 interprocess communications 44 MetaSDRAM 44 shader clock 44 SATA 6GB s 44 #Kbytes [002] 44 Power6 chip 44 serial transceivers 44 IOPs 44 TMS#DM# [001] 44 massively parallelized 44 Solaris Containers 44 TOEs 44 TI TMS#C# 44 x# [004] 44 baseband processing 44 speedup 44 6WINDGate 44 Operton 44 mathematical rigor 44 ARM Cortex M3 44 C#x + DSP 44 IBM Power4 44 unmixing 44 DDR3 memory controller 44 GeckoSuper 44 POJO 44 Intel LGA# [001] 44 Nucleus OS 44 PCRE 44 terascale computing 44 e# cores 44 Ethernet MACs 44 UltraSPARC T2 processor 44 PCI X 44 parameterized 44 SoC designs 44 RTOSs 44 XCore 44 Asynchronous 44 LPAR 43 ARM Cortex ™ 43 serial interconnects 43 SATA controller 43 Tensilica customizable 43 LabVIEW graphical 43 RAID configurations 43 OpenCL 43 OCTEON II 43 4Gb DDR3 43 graphics processors 43 multiprocessor architectures 43 AMD# [001] 43 SC# processor 43 optimizing compilers 43 AVR ONE 43 runtimes 43 Sparc# 43 reconfigurable hardware 43 AMD Opteron processors 43 GDSII flow 43 OCTEON Plus 43 literals 43 ADO.Net 43 PXIe 43 OSEck 43 RTSJ 43 UltraSPARC IV 43 CISC architecture 43 CUDA architecture 43 parasitics 43 GNU toolchain 43 Freescale MPC# 43 embedded SRAM 43 POWER4 43 perpendicular magnetic 43 decoherence 43 nano fluidic 43 NeoKicks 43 nanometer node 43 JTAG port 43 OneNAND Flash 43 Quad Core Intel 43 configurability 43 ARM7 processor 43 8MB cache 43 DDR2 memory controller 43 PCIe 43 modulation formats 43 spindle speeds 43 EEPROM emulation 43 toolpath generation 43 CUDA enabled 43 programmable shader 43 PXI module 43 OpenAccess 43 geometries shrink 43 PowerShell commands 43 VSIPL 43 cell SLC NAND 43 Opteron EE 43 Intel Xeon E# 43 4KEc 43 #.#v [004] 43 algorithms 43 bytecode 43 System Verilog 43 Myri #G 43 Application Specific Extension 43 integer arithmetic 43 cardinality 43 ASIC SoC 43 SDRAM memory 43 mod perl 43 voltage CMOS 43 Neo K# 43 Erlang 43 SPICE simulator 43 Mellanox InfiniBand 43 Cortex M0 43 snapshots replication 43 hardware abstraction layer 43 DDR2 SODIMM 43 6Gbps 43 5xx 43 elliptic curves 43 SGMII 43 tera scale 43 structured ASICs 43 Win# API 43 PHY# [001] 43 Math Kernel Library 43 parametrics 43 AXI TM 43 load balancing 43 Java Virtual Machine 43 DDR2 SDRAM 43 AMD Opteron 43 voltages 43 SPARC processors 43 numerical algorithms 43 LSISAS# 43 TrustZone 43 datarate 43 SIMD extensions 43 OpenGL 43 solver 43 ARM processor 43 pixel shader processors 43 Intel Turbo Memory 43 CgFX 43 serial RapidIO 43 clustering 43 UltraSparc 43 CPU usage 43 DesignWare DDR 43 ARM processors 43 DDR2 SDRAMs 43 XML Query 43 #nm Nehalem 43 Flash microcontrollers 43 nested loops 43 Intel Wireless MMX2 43 #GSE chipset 43 PL SQL 43 FinFET 43 quantum computation 43 optical interconnects 43 stateful 43 Actel FPGA 43 Josephson junctions 43 superscalar processor 43 ARM Cortex A9 processor 43 scale linearly 43 Lisp 43 i7 processor 43 Quad Core processor 43 #nm fabrication 43 inferencing 43 Fruehe 43 GDSII 43 DLLs 43 MSC# [001] 43 Clarksboro chipset 43 Cortex A8 43 SPEC benchmarks 43 YieldAssist 43 Excel macros 43 Synplify Pro software 43 compatibility 43 3Gb s SATA 43 hyperthreaded 43 CPU overclocking 43 interposer 43 Structured ASICs 43 backplane 43 Xilinx FPGAs 43 POWER5 + processor 43 exFAT file system 43 quantum phenomena 43 #Gbit/sec 43 5Gbps 43 workstation graphics accelerators 43 Altix XE# [002] 43 multi gigabit transceivers 43 dataplane 43 #.#Gbps [002] 43 Sparc processors 43 componentization 43 zOS 43 optimization algorithms 43 Streaming SIMD Extensions 43 MPC#E processor 43 vector supercomputers 43 compiler 43 SM#.# 43 VIA Nano processor 43 Cortex M3 processor 43 4Gbit/sec 43 IOP# 43 POWER5 processor 43 Enea LINX 43 logic analyzers 43 NVIDIA GPU computing 43 RAID adapters 43 Dual Quad Core 43 synthesis 43 IGP chipset 43 SRAMs 43 bidirectional